Not offered in 2005.
Synopsis: Hierarchical structure of digital devices: from gates to processors. The VHDL hardware description language and its application in synthesis and simulation of the digital devices. Behavioural, structural and data-flow specification of the design. Top-down and bottom-up design methodology. The microarchitectural and register-transfer representation levels. Structure of the Mentor Graphics CAD package. Tools for design specification, verification and technology mapping. Selected algorithms for digital design: Multipliers. Random Number Generators. The family of CORDIC algorithms for vector rotations, and elementary functions. FPGA and ASIC.
Assessment: 50% assignments (2) and practical work reports (2) + 50% final examination (2 hours)
Contact Hours: 2 hours lectures
Prerequisites: An undergraduate degree in a technical computing area such as a Bachelor of Digital Systems or Bachelor of Computer Science or equivalent, which includes at least two years study of digital logic and/or digital design, e.g. completion of CSE2306 or CSE2102 or equivalent