Clayton First semester 2006 (Day)
Clayton Full year 2006 (Day)
Clayton S2-S1-02 2006 (Day)
Clayton Second semester 2006 (Day)
Synopsis: This unit covers topics in hardware architecture ranging from the gate level to processors and full computer architecture, including: 1. Gate-level architecture 2. VLSI design 3.Hardware description languages and their application 4.Hardware design specifications and methodology 5.Software tools and packages for design, specification 6. selected algorithms for digital design: multipliers. random number generators. 7. FPGA, ASIC, 8.Machine organisation, memory structures and parallel architectures. Within the framework of this unit, students can select individual modules to specialise in a particular domain. For further details, refer to the course web pages.
Assessment: Assignment and Examination, relative weight depending on topic composition. When no exam is given students will be expected to demonstrate their knowledge by solving practical problems and may be required to give an oral report. This variability is designed to give flexibility to the lecturer to decided the most appropriate form of examination for a given choice of topics.
Contact Hours: Lecture: 39 hours, Laboratory: up to 40 hours
Prerequisites: Completion of the Bachelor of Computer Science or Bachelor of Digital Systems or Bachelor of Computing at an advanced level equivalent to the entry requirements for the Honours program. Students must also have enrolment approval from the Honours Coordinator. Individual modules in the framework of this unit may have additional prerequisites. For detailed information please contact the Honours coordinator.
Corequisites: Individual modules in the framework of this unit may have additional corequisites.
Prohibitions: Individual modules in the framework of this unit may have additional prohibitions.